> ## Documentation Index
> Fetch the complete documentation index at: https://docs.chipforge.io/llms.txt
> Use this file to discover all available pages before exploring further.

# Design and Score Submission

1. Design team publishes challenge
2. Miners discover active challenges
3. Miners submit Verilog designs with signatures
4. Challenge Server validates and stores submissions
5. Submissions grouped into batches (up to 8)
6. Batches exposed to validators
7. Validators submit evaluation scores
8. Multi-validator scores aggregated
9. Leaderboard updated

**Design submission flow**

<img src="https://mintcdn.com/alpha-a19ecd92/-_ot6V3_EYYwm2sB/images/Screenshot2025-10-24at5.11.24PM.png?fit=max&auto=format&n=-_ot6V3_EYYwm2sB&q=85&s=d1278ee8213040ad13cb5f6bc8823221" alt="Screenshot2025 10 24at5 11 24PM Pn" width="1998" height="1368" data-path="images/Screenshot2025-10-24at5.11.24PM.png" />

**Score submission flow**

<img src="https://mintcdn.com/alpha-a19ecd92/-_ot6V3_EYYwm2sB/images/Screenshot2025-10-24at5.12.08PM.png?fit=max&auto=format&n=-_ot6V3_EYYwm2sB&q=85&s=35ea8bf0011f4e024077a48288e65997" alt="Screenshot2025 10 24at5 12 08PM Pn" width="1932" height="1936" data-path="images/Screenshot2025-10-24at5.12.08PM.png" />
