> ## Documentation Index
> Fetch the complete documentation index at: https://docs.chipforge.io/llms.txt
> Use this file to discover all available pages before exploring further.

# Processors to AI Accelerators

This section details the structured, four-phase development plan for the SN84 Subnet, focusing on the progression from foundational processor development to advanced Edge AI System-on-Chip (SoC) realization. The roadmap incorporates decentralized development via the Bittensor framework to accelerate technical milestones.

<Columns cols={2}>
  <Card title="Phase 1" icon="computer" href="/whitepaper/roadmap/ph1">
    RISC-V Core Finalization (Target: Mid-November)
  </Card>

  <Card title="Phase 2" icon="solar-system" href="/whitepaper/roadmap/ph2">
    NPU Development (Target: By February 2026)
  </Card>

  <Card title="Phase 3" icon="solar-system" href="/whitepaper/roadmap/ph3">
    RTOS Integration and Verification (Target: By Feb 2026)
  </Card>

  <Card title="Phase 4" icon="solar-system" href="/whitepaper/roadmap/ph4">
    System-on-Chip Integration (Target: Post-Feb 2026)
  </Card>

  <Card title="Phase 5" icon="solar-system" href="/whitepaper/roadmap/ph5">
    Tape-out and Fabrication Readiness (Target: November 2026)
  </Card>
</Columns>